1. Field of the Invention
The present invention relates to a procedure as well as a device for analog-to-digital conversion of time-discrete analog input values.
2. Related Background Art
For analog-to-digital (A/D) conversion of time-discrete analog input values numerous procedures or devices are known. The A/D converters, hereafter also called ADC""s, can be divided into two groups. On the one hand the Nyquist ADC, which for every conversion assigns a digital output value to an analog input value, whereby the conversion rate to meet the Nyquist criterion is at least double the highest frequency to be converted in the input values. Such converters are for example converters based on successive approximation, flash converters, parallel converters or pipeline converters.
Furthermore xcex94-modulators and xcexa3xcex94 modulators are known, in which analog input values are digitized, the digital output signal is again analogized by means of an analog-to-digital converter, and this analog value is fed back to at least a subsequent analog input value. Such A/D converters are operated at a higher frequency than would be necessary according to the Nyquist criterion. This is also called oversampling. Therefore a distribution of the quantization noise, which results from the inevitable quantization errors, can be achieved by means of a larger spectral range. The quantization noise can then be better eliminated from the digital output signal with the aid of suitable filters, whereby advantageously a digital filter can be used. Since with oversampling the difference between the conversion frequency and the highest frequency contained in the input signal to be converted is increased, advantageously the edge steepness can be reduced. Furthermore the procedure of noise shaping is known in the case of xcex94-modulators and xcexa3xcex94 modulators, in which procedure the quantization noise is shifted by suitable feedback of the digital output signal of the quantizer from the useful bandwidth to the subband lying outside, where it can be filtered, so that the quantization noise in the useful bandwidth can be reduced further. Since in the case of xcex94-modulators and xcexa3xcex94 modulators the digital value supplied by the quantizer is analogized and fed back again anyway in an analog-to-digital converter, noise shaping can be additionally introduced in such cases at little extra cost.
The implementation of noise shaping in the case of Nyquist ADC""s is not known at present, so that A/D converters of this kind have greater quantization noise.
The object of the present invention is to provide a procedure or a device for analog-to-digital conversion of time-discrete analog input values, whereby the quantization noise can be reduced at low cost.
The object according to the invention is achieved by a procedure with the features of claim 1 or a device with the features of claim 12. The sub-claims in each case define advantageous and preferential embodiments of the present invention.
With the quantizer according to the invention the quantization error is computed in analog form and fed back to a subsequent input value. In this case the fact is exploited that with most A/D converters the quantization error is present inside the circuit and can be picked up in analog form. The quantization error is determined and fed back to at least a subsequent input value whereby this can take place for example with the aid of an analog subtracter.
For the feed back of a quantization error of a particular conversion to a subsequent input value the quantization error is preferably buffered. This can happen for example in a sample-and-hold unit. If each quantization error of a conversion of a particular input value is to be fed back to several subsequent input values, a plurality of memory units, in particular in the form of sample-and-hold units, may be provided, in order to be able to also store quantization errors for several conversion steps of the quantizer.
Feedback of a quantization error to at least a subsequent input value is equivalent to the feedback of at least one quantization error of a previous conversion to a particular input value. In both cases it happens that quantization errors of at least one previous conversion are fed back to an input value. If several quantization errors prior to a varying number of conversions are fed back to an input value, a delay network is preferably provided, in which the quantization errors are passed through as in a shift register, whereby after each conversion the quantization error, which preceded a particular number of conversions, can be picked up at the individual points of the delay network.
If quantization errors prior to a varying number of conversions are fed back to an input value, the different quantization errors can be evaluated with particular factors, which are selected as a function of how many conversions the fed-back quantization error preceded. In this way filtering similar to a digital filter is achieved, whereby in contrast to a digital filter time-discrete analog values are processed.
The delay network can in particular be built up from a daisy chain of sample-and-hold units.
The feedback of at least one quantization error to an input value must generally take place in such a way that the quantization error, possibly evaluated with a factor, is subtracted from the input value or added to it. For this purpose additionally to the use of an adder or a subtracter further possibilities may result dependent on the type of quantizer. If for example a quantizer works on the basis of successive approximation, then the quantizer necessarily comprises an analog-to-digital converter, to which the quantization error to be fed back can be relayed in addition to the input value. If the analog-to-digital converter used has at least one parallel connection of switched capacitors, which at one end are connected to each other and the other end of which can be supplied in a controllable way with the voltage to be quantized or a reference voltage, individual capacitors of this parallel connection can be set up in such a manner that they can be supplied at one end either with the reference voltage or with the quantization error.
With quantization based on the procedure of successive approximation the quantization error is at the end of the last approximation step and can be determined simply as the difference between the output signal of the A/D converter in the quantizer and the input value. Usually quantizers of this kind have a comparator for comparing the input value and the output value of the analog-to-digital converter, so that the quantization error is received by the comparator at the end of the conversion and can be picked up from this.
If a pipeline ADC is used the time delay for feeding back the quantization error to at least a subsequent input value can be achieved at particularly low cost. With pipeline ADC""s of this kind an analog input value is stored in analog form and quantized with a particular resolution. The quantization result is sent to an analog-to-digital converter, the output signal of which is subtracted from the stored input value, whereby the resulting voltage difference represents the quantization error of the first quantization and is amplifier in a subsequent amplifier. This buffering, quantizing and amplification of the quantization error of an input value forms one stage of the pipeline ADC. In this stage the input value was already digitized with a particular resolution. The digital information determined thereby in the first stage is the highest value.
The quantization error amplified by the amplifier is fed to a next stage as an input value, which is structured in the same way as the first stage, so that the amplified quantization error of the first stage is stored and quantized with a particular resolution, whereby the quantization result is analogized in an analog-to-digital converter of the second stage and subtracted from the stored input value of the second stage and the differential voltage arising therefrom is again amplified.
Further stages can be joined onto the second stage. The resolution, with which the respective input value is quantized in each stage, is arbitrary. In principle the subsequent stages supply lower-grade information than the previous stage in each case.
If for example the respective input value is quantized with two bits in each stage, then the total resolution in bits results in 2 bits times the number of stages. The accuracy of the analog-to-digital converters used in the individual stages must be suitably adapted in this case. If for example a pipeline ADC has a total resolution of 10 bits, the analog-to-digital converter of the first stage, irrespective of the resolution of the first stage, must be accurate to at least 10 bits. Since in the subsequent stages still less valuable information or bits are recovered, the requirement for accuracy of the analog-to-digital converter is reduced in the subsequent stages.
A significant advantage of the pipeline ADC consists in that the input values are stored at each stage. In this way the first stage of processing the next input value does not have to wait until the previous input value has been processed by all stages. After processing for example a first input value by the first stage the quantization error arising as a result is stored by the second stage. While the second stage processes the quantization error of the first stage of the first input value, the first stage can already process the next second input value. In this way effectively with each processing step of the stages processing of a new input value is started or a new conversion result of an input value arises with each processing step of the stages. The quantization results obtained from the individual stages for this purpose however must be appropriately linked with one another. For this purpose the quantization results of the stages can be held in buffers, whereby each buffer stores the value of the assigned stage plus the stored value of the buffer from the previous stage. With progressive processing of an input value or the quantization errors in the stages arising during processing, at the same time the quantization results arising thereby are shifted along and summed up in this way. Error correction is also conceivable with a pipeline ADC, in which the amplification of the amplifiers in the individual stages and the resolution of the quantizers in the subsequent stages are harmonized in such a way that in relation to the total conversion result certain bits are converted at the same time in two adjacent stages. In this way errors of the quantizer can be balanced out and linearity errors corrected in the individual stages.
With pipeline ADC""s of this kind the quantization error is picked up during the last stage. The feedback to subsequent input values can be implemented at particularly low cost, the quantization error being fed back in analog form in a previous stage and received by the subtracter present there anyway.
The present invention can also be used with parallel or flash converters, in which the input value is compared with a string of several reference voltages, the results of the comparisons being priority-coded. The reference voltages are picked up in particular on a series circuit by resistors, whereby a reference voltage is applied to the series circuit. Crucial for the conversion result in the case of an ADC of this kind is the comparison at which the smallest voltage difference arises between the input value and the reference voltage. In practice the comparisons between the reference voltages and the input value provide a digital value, if the comparisons are wired as comparators for example, so that the comparator, which still indicates for the highest reference voltage that the input value lies above the reference voltage, is crucial for the conversion result. Equally the comparator, which indicates for the lowest reference voltage that the reference voltage is below the input value, can be used as the ruling comparator. With an ADC of this kind the quantization result which was crucial for the conversion result must be picked up at the comparator. For this purpose it must be possible for example with the aid of a multiplexer to be able to select the input differential voltage of each comparator in order to be able to feed this quantization error back.
Advantageously the quantizer is operated at a frequency, which is more than double the highest frequency arising in the useful spectral range to be converted. In other words oversampling is preferably used, in order to be able to reduce the quantization noise.
The quantization error is preferably fed back to the subsequent input values in such a way that the quantization noise is shifted from the useful spectral range to higher-frequency spectral ranges, so that the quantization noise in the useful spectral range can be reduced.